Of course occur anyway during the purchase process differences of opinion. A taxonomy of the most important aspects of the architecture is needed. It should be noticed that a Harvard architecture does not mean separate buses from the cache tomain memory. The registers can be locked in order to control its utilization by concurrent floating point operations. Verification of the telephone accessibility the main phone number. The philosophy of the time was to build machines which could diminish the semantic gap between high level languages and the machine language. Another technique borrowed from mainframes is the so called "zero cycle" branching. Literature, there seems to be now an overwhelming case in favor of Reduced Instruction Set Computers (risc) as high performance computing engines. The floating point unit provides 32 registers 64 bits wide. In the future still more technology will migrate from the mainframe world to microprocessors. That is the case with IBM and Intel. In some benchmarks the IBM RS/6000 approaches a CPI of almost.1 and the geometric average of the CPI measured in 9 of the spec benchmarks.6 Stephens et al 1991. In what follows the design parameters of the Cypress sparc chips are discussed Cypress 1990. The number of stages in the execution path is an architectural feature which can be changed according to the intended exploitation of instruction level parallelism. The fixed point unit works with four additional stages and the floating point unit with six Grohoski 1990.